The present invention relates generally to power multiplexors. More particularly, the present invention relates to power multiplexors which, in response to control input signals, selectively and efficiently provide a plurality of high-voltage levels to a common conductor.
Certain circuits require a plurality of voltage levels on a given conductor at various times for their operation. By way of example, there exists a type of integrated circuit known as Programmable Logic Devices (PLD's), which typically make use of one or more programmable interconnect arrays to configure themselves to a specific user's design. The programmable interconnect arrays are typically composed of some type of nonvolatile, floating gate memory cell (e.g., EPROM, EEPROM, flash EPROM, and the like), which requires a plurality of voltage levels, some of which are high-voltage, to program, erase, and verify the cell. As the term is used herein, high-voltage refers to, voltage levels above the normal supply voltage, Vcc, of the device, which is typically between approximately 3 volts and 5 volts for most circuits.
By way of example, programming a memory cell of a PLD may require a voltage level of approximately 10 -12 volts on its gate. To erase that memory cell, a voltage level of approximately 0 volts may be required on the same gate. Verifying the result of programming may require a voltage level of 7-8 volts also on the gate of the memory cell while verifying the result of erasure may require yet another gate voltage level, e.g., 2-3 volts. For further information regarding Programmable Logic Devices (PLD's) in general, reference may be made to a publication entitled The Programmable Logic Data Book (1995 ed.), available from Xilinx, Inc. of San Jose, Calif., which publication is incorporated herein by reference in its entirety for all purposes.
In the prior art, discrete voltage sources, typically in the form of power supplies that are physically separate from the integrated circuit whose conductor requires the multiple voltage levels, are often used to directly supply the various voltage levels to that conductor. For example, PLD's that are programmed out-of-system, e.g., when placed in a programming socket, typically have their memory cell gates sourced by power supplies in the programmer. In these off-chip power supplies, multiple voltage levels may be generated and supplied to the PLD independent of the PLD's Vcc supply voltage. Further, the amount of current supplied by the off-chip power supplies to the target circuit in these applications is not a limiting factor.
In some cases, it may be desirable to shrink the voltage sources and place them on chip, even directly on the same chip that requires the multiple voltage levels. When so implemented, the miniaturized voltage sources typically must generate all the required voltage levels, using a host of different circuits such as charge pumps, reference voltages, and the like, from the supply voltage Vcc. A high-voltage power multiplexor is then needed to switch among the circuits to make use of the different voltage levels generated thereby.
Further, the miniaturized voltage sources can usually supply only a limited amount of current, say a few hundred microamps. For these miniaturized on-chip voltage sources, greater output current usually comes at the expense of chip size since a high-power voltage source typically requires a greater circuit area to implement than one which supplies a lower output current. To minimize chip size and power consumption, it is therefore desirable to use as few high-power on-chip voltage sources as possible.
Because of the size, power, and other constraints imposed by the placement of voltage sources on chip, it is therefore highly desirable to devise a power multiplexing scheme that can switch, responsive to control signals, among the multiple voltage sources to supply the common conductor with the required voltage levels in an efficient manner.